mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 217

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mc9s12hz256v2

Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
7.3.2.4
This register controls the conversion sequence length, FIFO for results registers and behavior in Freeze
Mode. Writes to this register will abort current conversion sequence but will not start a new sequence.
Read: Anytime
Write: Anytime
Freescale Semiconductor
Reset
Field
S8C
S4C
S2C
S1C
W
6
5
4
3
R
ATD Control Register 3 (ATDCTL3)
0
0
7
Conversion Sequence Length — This bit controls the number of conversions per sequence.
all combinations. At reset, S4C is set to 1 (sequence length is 4). This is to maintain software continuity to HC12
Family.
Conversion Sequence Length — This bit controls the number of conversions per sequence.
all combinations. At reset, S4C is set to 1 (sequence length is 4). This is to maintain software continuity to HC12
Family.
Conversion Sequence Length — This bit controls the number of conversions per sequence.
all combinations. At reset, S4C is set to 1 (sequence length is 4). This is to maintain software continuity to HC12
Family.
Conversion Sequence Length — This bit controls the number of conversions per sequence.
all combinations. At reset, S4C is set to 1 (sequence length is 4). This is to maintain software continuity to HC12
Family.
= Unimplemented or Reserved
S8C
0
6
Figure 7-6. ATD Control Register 3 (ATDCTL3)
Table 7-8. ATDCTL3 Field Descriptions
MC9S12HZ256 Data Sheet, Rev. 2.05
S4C
1
5
S2C
0
4
Description
S1C
Chapter 7 Analog-to-Digital Converter (ATD10B16CV4)
0
3
FIFO
0
2
FRZ1
0
1
Table 7-9
Table 7-9
Table 7-9
Table 7-9
FRZ0
0
0
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