mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 142

• Manufacturer Part Number: mc9s12hz256v2
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 4 Port Integration Module (PIM9HZ256V2)
4.3.4.7
Read: Anytime. Write: Anytime.
This register selects whether a port P output is configured as push-pull or wired-or. When a Wired-OR
Mode Register bit is set to 1, the corresponding output pin is driven active low only (open drain) and a
high level is not driven. A Wired-OR Mode Register bit has no effect if the corresponding pin is configured
as an input.
If the IIC is enabled and the corresponding PWM channels are disabled, the PP[5:4] pins are configured
as wired-or and the corresponding Wired-OR Mode Register bits have no effect.
142
WOMP[5:4]
WOMP2
WOMP0
Reset
Field
5:4
2
0
W
R
Wired-OR Mode Port P
0 Output buffers operate as push-pull outputs.
1 Output buffers operate as open-drain outputs.
Wired-OR Mode Port P
0 Output buffers operate as push-pull outputs.
1 Output buffers operate as open-drain outputs.
Wired-OR Mode Port P
0 Output buffers operate as push-pull outputs.
1 Output buffers operate as open-drain outputs.
Port P Wired-OR Mode Register (WOMP)
0
0
7
= Reserved or Unimplemented
0
0
6
Figure 4-29. Port P Wired-OR Mode Register (WOMP)
Table 4-22. WOMP Field Descriptions
WOMP5
MC9S12HZ256 Data Sheet, Rev. 2.05
0
5
WOMP4
0
4
Description
0
0
3
WOMP2
0
2
Freescale Semiconductor
0
0
1
WOMPO
0
0