mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 649

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mc9s12hz256v2

Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1
Freescale Semiconductor
Conditions are shown in
Num C
10
11
12
The numbers 7, 8 in the column labeled “Num” are missing. This has been done on purpose to be consistent between the
Master and the Slave timing shown in
1
1
2
3
4
5
6
9
(CPOL
(CPOL
(OUTPUT)
(OUTPUT)
(OUTPUT)
(OUTPUT)
1. If configured as output
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
(INPUT)
P Operating Frequency
P SCK Period t
D Enable Lead Time
D Enable Lag Time
D Clock (SCK) High or Low Time
D Data Setup Time (Inputs)
D Data Hold Time (Inputs)
D Data Valid (after SCK Edge)
D Data Hold Time (Outputs)
D Rise Time Inputs and Outputs
D Fall Time Inputs and Outputs
MISO
MOSI
SCK
SCK
SS
1
0)
1)
PORT DATA
9
sck
Table A-4
= 1./f
2
MASTER MSB OUT
4
5
Table A-19. SPI Master Mode Timing Characteristics
op
MSB IN
Rating
unless otherwise noted, C
1
Figure A-7. SPI Master Timing (CPHA =1)
Table
6
2
4
MC9S12HZ256 Data Sheet, Rev. 2.05
A-20.
2
12
11
10
BIT 6 . . . 1
BIT 6 . . . 1
LOAD
= 200pF on all outputs
Symbol
t
t
t
wsck
t
lead
f
t
t
sck
lag
t
t
op
su
ho
t
t
hi
v
r
f
11
12
MASTER LSB OUT
t
bus
Min
DC
1 2
1 2
25
LSB IN
4
0
0
30
Appendix A Electrical Characteristics
1
3
Typ
PORT DATA
1024 t
2048
Max
1 4
25
25
25
bus
Unit
f
t
t
t
bus
bus
ns
ns
ns
ns
ns
ns
ns
sck
sck
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