mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 548

• Manufacturer Part Number: mc9s12hz256v2
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 19 Debug Module (DBGV1)
19.3.2.6
548
PORTK/XAB
PPAGE
Reset
Reset
Field
7
15:0
SEE NOTE 1
PAGSEL
W
W
R
R
NOTES:
1. In BKP and DBG mode, PAGSEL selects the type of paging as shown in
2. Current HCS12 implementations are limited to six PPAGE bits, PIX[5:0]. Therefore, EXTCMP[5:4] = 00.
Bit 15
Bit 7
Comparator C Compare Bits — The comparator C compare bits control whether comparator C will compare
the address bus bits [15:0] to a logic 1 or logic 0. See
0 Compare corresponding address bit to a logic 0
1 Compare corresponding address bit to a logic 1
Note: This register will be cleared automatically when the DBG module is armed in LOOP1 mode.
6
Debug Comparator C Register (DBGCC)
15
0
0
7
Figure 19-10. Comparator C Extended Comparison in BKP/DBG Mode
XAB21
PIX7
= Unimplemented or Reserved
= Unimplemented or Reserved
SEE NOTE 2
0
5
Figure 19-11. Debug Comparator C Register High (DBGCCH)
Figure 19-12. Debug Comparator C Register Low (DBGCCL)
Bit 14
Bit 6
14
0
0
6
XAB20
PIX6
0
4
Table 19-12. DBGCC Field Descriptions
XAB19
PIX5
Bit 13
MC9S12HZ256 Data Sheet, Rev. 2.05
Bit 5
3
13
0
0
5
DBGCXX
EXTCMP
XAB18
PIX4
2
Bit 12
Bit 4
12
0
0
4
XAB17
PIX3
1
Description
Table
XAB16
BIT 0
PIX2
Bit 11
Bit 3
11
19-13.
0
0
3
Table
XAB15
BIT 15
PIX1
19-11.
Bit 10
Bit 2
10
0
0
2
XAB14
BIT 14
PIX0
DBGCXH[15:12]
BIT 13
Freescale Semiconductor
Bit 9
Bit 1
0
0
9
1
BIT 12
Bit 8
Bit 0
0
0
8
0