mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 504

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mc9s12hz256v2

Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Chapter 17 Dual Output Voltage Regulator (VREG3V3V2)
17.2.3
Signals V
These signals are connected to device pins to allow external decoupling capacitors (100 nF...220 nF, X7R
ceramic).
In Shutdown Mode an external supply at V
17.2.4
Signals V
PLL and oscillator. These signals are connected to device pins to allow external decoupling capacitors
(100 nF...220 nF, X7R ceramic).
In Shutdown Mode an external supply at V
17.2.5
This optional signal is used to shutdown VREG3V3. In that case V
provided externally. Shutdown Mode is entered with V
VREG3V3 is either in Full Performance Mode or in Reduced Power Mode.
For the connectivity of V
17.3
This subsection provides a detailed description of all registers accessible in VREG3V3.
17.3.1
Figure 17-2
504
DD
DDPLL
Memory Map and Register Definition
Address
0x0000
Offset
V
V
V
Module Memory Map
provides an overview of all used registers.
/V
DD
DDPLL
REGEN
Switching from FPM or RPM to shutdown of VREG3V3 and vice versa is
not supported while the MCU is powered.
SS
/V
, V
are the primary outputs of VREG3V3 that provide the power supply for the core logic.
SSPLL
SS
, V
— Optional Regulator Enable
— Regulator Output1 (Core Logic)
are the secondary outputs of VREG3V3 that provide the power supply for the
SSPLL
REGEN
see device overview chapter.
— Regulator Output2 (PLL)
VREG3V3 Control Register (VREGCTRL)
Table 17-2. VREG3V3 Memory Map
MC9S12HZ256 Data Sheet, Rev. 2.05
DD
DDPLL
/V
SS
NOTE
/V
Use
can replace the voltage regulator.
SSPLL
REGEN
can replace the voltage regulator.
being low. If V
DD
/V
SS
and V
REGEN
DDPLL
Freescale Semiconductor
is high, the
/V
Access
R/W
SSPLL
must be

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