mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 67

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mc9s12hz256v2

Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
2.3.2.3
All bits read 0 and are not writable in normal mode. The WRALL bit is writable only in special mode to
simplify mass erase and erase verify operations. When writing to the FTSTMOD register in special mode,
all unimplemented/reserved bits must be written to 0.
2.3.2.4
The unbanked FCNFG register enables the Flash interrupts and gates the security backdoor writes.
CBEIE, CCIE, KEYACC and BKSEL bits are readable and writable while all remaining bits read 0 and
are not writable. KEYACC is only writable if KEYEN (see
Freescale Semiconductor
The unbanked FTSTMOD register is used to control Flash test features.
WRALL
Reset
Reset
Field
4
W
W
R
R
CBEIE
Write to All Register Banks — If the WRALL bit is set, all banked registers sharing the same register address
will be written simultaneously during a register write.
0 Write only to the bank selected via BKSEL.
1 Write to all register banks.
Flash Test Mode Register (FTSTMOD)
Flash Configuration Register (FCNFG)
7
0
0
7
0
= Unimplemented or Reserved
= Unimplemented or Reserved
CCIE
6
0
0
6
0
Figure 2-7. Flash Configuration Register (FCNFG)
Figure 2-6. Flash Test Mode Register (FTSTMOD)
Table 2-8. FTSTMOD Field Descriptions
KEYACC
MC9S12HZ256 Data Sheet, Rev. 2.05
5
0
0
5
0
WRALL
4
0
4
0
0
Description
Section
3
0
0
3
0
0
Chapter 2 256 Kbyte Flash Module (FTS256K2V1)
2.3.2.2) is set to the enabled state.
2
0
0
2
0
0
1
0
0
1
0
0
BKSEL
0
0
0
0
0
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