mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 74

• Manufacturer Part Number: mc9s12hz256v2
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 2 256 Kbyte Flash Module (FTS256K2V1)
All CMDB bits are readable and writable during a command write sequence while bit 7 reads 0 and is not
writable.
2.3.2.9
The banked FCTL register is the Flash control register.
All bits in the FCTL register are readable but are not writable.
The FCTL register is loaded from the Flash Configuration Field byte at $FF0E during the reset sequence,
indicated by F in
74
CMDB[6:0]
NV[7:0]
Reset
Reset
Field
Field
6-0
7-0
W
W
R
R
Flash Command — Valid Flash commands are shown in
listed in
NV7
Nonvolatile Bits — The NV[7:0] bits are available as nonvolatile bits. Refer to the Device User Guide for proper
use of the NV bits.
Flash Control Register (FCTL)
F
7
0
0
7
Figure
Table 2-18
= Unimplemented or Reserved
Figure 2-12. Flash Command Register (FCMD - NVM User Mode)
= Unimplemented or Reserved
2-13.
NV6
6
0
6
F
sets the ACCERR flag in the FSTAT register.
Figure 2-13. Flash Control Register (FCTL)
CMDB[6:0]
Table 2-18. Valid Flash Command List
Table 2-17. FCMD Field Descriptions
Table 2-19. FCTL Field Descriptions
0x05
0x06
0x20
0x40
0x41
0x47
MC9S12HZ256 Data Sheet, Rev. 2.05
NV5
5
0
5
F
NV4
4
0
4
F
Description
Description
Sector Erase Abort
NVM Command
Data Compress
Word Program
Sector Erase
Erase Verify
Mass Erase
CMDB
Table
NV3
F
3
0
3
2-18. Writing any command other than those
NV2
2
0
2
F
Freescale Semiconductor
NV1
1
0
1
F
NV0
F
0
0
0