mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 365
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mc9s12hz256v2
Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12HZ256V2.pdf
(692 pages)
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Module Base + 0x0004 (DSR0)
12.3.3.3
This register keeps the data length field of the CAN frame.
Freescale Semiconductor
DLC[3:0]
DB[7:0]
Field
Field
7:0
3:0
Reset:
Reset:
W
W
Figure 12-31. Data Segment Registers (DSR0–DSR7) — Extended Identifier Mapping
R
R
0x0005 (DSR1)
0x0006 (DSR2)
0x0007 (DSR3)
0x0008 (DSR4)
0x0009 (DSR5)
0x000A (DSR6)
0x000B (DSR7)
Data bits 7:0
Data Length Code Bits — The data length code contains the number of bytes (data byte count) of the respective
message. During the transmission of a remote frame, the data length code is transmitted as programmed while
the number of transmitted data bytes is always 0. The data byte count ranges from 0 to 8 for a data frame.
Table 12-34
Data Length Register (DLR)
DB7
Figure 12-32. Data Length Register (DLR) — Extended Identifier Mapping
7
x
7
x
shows the effect of setting the DLC bits.
= Unused; always read “x”
Table 12-32. DSR0–DSR7 Register Field Descriptions
DB6
6
x
6
x
Table 12-33. DLR Register Field Descriptions
MC9S12HZ256 Data Sheet, Rev. 2.05
DB5
5
x
5
x
Chapter 12 Freescale’s Scalable Controller Area Network (MSCANV2)
DB4
4
x
4
x
Description
Description
DLC3
DB3
x
x
3
3
DLC2
DB2
2
x
2
x
DLC1
DB1
x
x
1
1
DLC0
DB0
0
x
0
x
365
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