mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 69
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mc9s12hz256v2
Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12HZ256V2.pdf
(692 pages)
- Current page: 69 of 692
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Trying to alter data in any of the protected areas in the Flash block will result in a protection violation error
and the PVIOL flag will be set in the FSTAT register. A mass erase of the Flash block is not possible if
any of the contained Flash sectors are protected.
Freescale Semiconductor
FPHS[1:0]
FPLS[1:0]
FPOPEN
FPHDIS
FPLDIS
RNV[6]
Field
4:3
1:0
7
6
5
2
Protection Function Bit — The FPOPEN bit determines the protection function for program or erase as shown
in
0 FPHDIS and FPLDIS bits define unprotected address ranges as specified by the corresponding FPHS[1:0]
1 FPHDIS and FPLDIS bits enable protection for the address range specified by the corresponding FPHS[1:0]
Reserved Nonvolatile Bit — The RNV[6] bit must remain in the erased state 1 for future enhancements.
Flash Protection Higher Address Range Disable — The FPHDIS bit determines whether there is a
protected/unprotected area in the higher address space of the Flash block.
0 Protection/Unprotection enabled
1 Protection/Unprotection disabled
Flash Protection Higher Address Size — The FPHS[1:0] bits determine the size of the protected/unprotected
area as shown in
Flash Protection Lower address range Disable — The FPLDIS bit determines whether there is a
protected/unprotected area in the lower address space of the Flash block.
0 Protection/Unprotection enabled
1 Protection/Unprotection disabled
Flash Protection Lower Address Size — The FPLS[1:0] bits determine the size of the protected/unprotected
area as shown in
Table
and FPLS[1:0] bits. For an MCU without an EEPROM module, the FPOPEN clear state allows the main part
of the Flash block to be protected while a small address range can remain unprotected for EEPROM
emulation.
and FPLS[1:0] bits.
1
For range sizes, refer to
FPOPEN
2-12.
1
1
1
1
0
0
0
0
Table
Table
FPHDIS
2-13. The FPHS[1:0] bits can only be written to while the FPHDIS bit is set.
2-14. The FPLS[1:0] bits can only be written to while the FPLDIS bit is set.
Table 2-11. FPROT Field Descriptions
Table 2-12. Flash Protection Function
1
1
0
0
1
1
0
0
MC9S12HZ256 Data Sheet, Rev. 2.05
Table 2-13
FPLDIS
1
0
1
0
1
0
1
0
and
Table
No Protection
Protected Low Range
Protected High Range
Protected High and Low Ranges
Full Block Protected
Unprotected Low Range
Unprotected High Range
Unprotected High and Low Ranges
Description
2-14.
Chapter 2 256 Kbyte Flash Module (FTS256K2V1)
Function
1
69
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