DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 109

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

5.8.4
Some specifications on slot illegal instruction exception handling in this LSI differ from those of
the conventional SH-2.
• Conventional SH-2: Instructions LDC Rm,SR and LDC.L @Rm+,SR are not subject to the
• This LSI: Instructions LDC Rm,SR and LDC.L @Rm+,SR are subject to the slot illegal
The supporting status on our software products regarding this note is as follows:
Compiler
This instruction is not allocated in the delay slot in the compiler V.4 and its subsequent versions.
Real-time OS for μITRON specifications
1. HI7000/4, HI-SH7
2. HI7000
3. Others
Note that a check-up program (checker) to pick up this instruction is available on our website.
Download and utilize this checker as needed.
slot illegal instructions.
instructions.
This instruction does not exist in the delay slot within the OS.
This instruction is in part allocated to the delay slot within the OS, which may cause the slot
illegal instruction exception handling in this LSI.
The slot illegal instruction exception handling may be generated in this LSI in a case where the
instruction is described in assembler or when the middleware of the object is introduced.
Notes on Slot Illegal Instruction Exception Handling
Rev. 5.00 Mar. 06, 2009 Page 89 of 770
REJ09B0243-0500