DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 574

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

16.1
Port A in the SH7125 is an input/output port with the 16 pins shown in figure 16.1.
Port A in the SH7124 is an input/output port with the eight pins shown in figure 16.2.
Rev. 5.00 Mar. 06, 2009 Page 554 of 770
REJ09B0243-0500
Port A
Port A
Note: * The TDO, TDI, TCK, TMS, and TRST pins are not supported on the 32 Kbyte versions (SH71251A and SH71241A) and
Note: * The TDO, TDI, TCK, TMS, and TRST pins are not supported on the 32 Kbyte versions (SH71251A and SH71241A) and
Port A
16 Kbyte versions (SH71250A and SH71240A).
16 Kbyte versions (SH71250A and SH71240A).
PA15 (I/O)/ TXD1 (output)
PA14 (I/O)/ RXD1 (input)
PA13 (I/O)/ SCK1 (I/O)
PA12 (I/O)/ SCK0 (I/O)
PA11 (I/O)/ TXD0 (output)/ ADTRG (input)
PA10 (I/O)/ RXD0 (input)
PA9 (I/O)/ TCLKD (input)/ TXD2 (output)/ TDO* (output)/ POE8 (input)
PA8 (I/O)/ TCLKC (input)/ RXD2 (input)/ TDI* (input)
PA7 (I/O)/ TCLKB (input)/ SCK2 (I/O)/ TCK* (input)
PA6 (I/O)/ TCLKA (input)
PA5 (I/O)/ IRQ3 (input)/ SCK1 (I/O)
PA4 (I/O)/I RQ2 (input)/ TXD1 (output)/ TMS* (input)
PA3 (I/O)/ IRQ1 (input)/ RXD1 (input)/ TRST* (input)
PA2 (I/O)/ IRQ0 (input)/ SCK0 (I/O)
PA1 (I/O)/ POE1 (input)/ TXD0 (output)
PA0 (I/O)/ POE0 (input)/ RXD0 (input)
PA9 (I/O)/ TCLKD (input)/ TXD2 (output)/ TDO* (output)/ POE8 (input)
PA8 (I/O)/ TCLKC (input)/ RXD2 (input)/ TDI* (input)
PA7 (I/O)/ TCLKB (input)/ SCK2 (I/O)/ TCK* (input)
PA6 (I/O)/ TCLKA (input)
PA4 (I/O)/I RQ2 (input)/ TXD1 (output)/ TMS* (input)
PA3 (I/O)/ IRQ1 (input)/ RXD1 (input)/ TRST* (input)
PA1 (I/O)/ POE1 (input)/ TXD0 (output)
PA0 (I/O)/ POE0 (input)/ RXD0 (input)
Figure 16.1 Port A (SH7125)
Figure 16.2 Port A (SH7124)