DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 464
![MCU RISC FLASH 32K 8K 64LQFP](/photos/28/61/286100/64-lqfp__plqp0064kb-a_sml.jpg)
DF71251AD50FPV
Manufacturer Part Number
DF71251AD50FPV
Description
MCU RISC FLASH 32K 8K 64LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH Tinyr
Datasheet
1.DF71243N50FPV.pdf
(794 pages)
Specifications of DF71251AD50FPV
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
SCI
Peripherals
POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF71251AD50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 464 of 794
- Download datasheet (5Mb)
12.4
12.4.1
For serial communication, the SCI has an asynchronous mode in which characters are
synchronized individually, and a clock synchronous mode in which communication is
synchronized with clock pulses.
Asynchronous or clock synchronous mode is selected and the transmit format is specified in the
serial mode register (SCSMR) as shown in table 12.13. The SCI clock source is selected by the
combination of the C/A bit in SCSMR and the CKE1 and CKE0 bits in the serial control register
(SCSCR) as shown in table 12.14.
(1)
• Data length is selectable: 7 or 8 bits.
• Parity bit is selectable. So is the stop bit length (1 or 2 bits). The combination of the preceding
• In receiving, it is possible to detect framing errors, parity errors, overrun errors, and breaks.
• An internal or external clock can be selected as the SCI clock source.
(2)
• The transmission/reception format has a fixed 8-bit data length.
• In receiving, it is possible to detect overrun errors.
• An internal or external clock can be selected as the SCI clock source.
Rev. 5.00 Mar. 06, 2009 Page 444 of 770
REJ09B0243-0500
selections constitutes the communication format and character length.
⎯ When an internal clock is selected, the SCI operates using the clock supplied by the on-
⎯ When an external clock is selected, the external clock input must have a frequency 16 times
⎯ When an internal clock is selected, the SCI operates using the on-chip baud rate generator,
⎯ When an external clock is selected, the SCI operates on the input serial clock. The on-chip
Asynchronous Mode (Channels 0 to 2 in the SH7125, Channels 0 to 2 in the SH7124)
Clock Synchronous Mode (Channels 0 to 2 in the SH7125, Channels 0 and 2 in the
SH7124)
chip baud rate generator and can output a clock with a frequency 16 times the bit rate.
the bit rate. (The on-chip baud rate generator is not used.)
and outputs a serial clock signal to external devices.
baud rate generator is not used.
Operation
Overview
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