DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 635

MCU RISC FLASH 32K 8K 64LQFP

DF71251AD50FPV

Manufacturer Part Number
DF71251AD50FPV
Description
MCU RISC FLASH 32K 8K 64LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH Tinyr
Datasheet

Specifications of DF71251AD50FPV

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
SCI
Peripherals
POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF71251AD50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
17.5.2
The user MAT can be programmed/erased in user program mode.
Programming/erasing is executed by downloading the program in the microcomputer.
The overview flow is shown in figure 17.9.
High voltage is applied to internal flash memory during the programming/erasing processing.
Therefore, transition to reset must not be executed. Doing so may cause damage or destroy flash
memory. If reset is executed accidentally, the reset signal must be released after the reset input
period, which is longer than the normal 100 μs.
For details on the programming procedure, see the description in section 17.5.2 (2), Programming
Procedure in User Program Mode. For details on the erasing procedure, see the description in
section 17.5.2 (3), Erasing Procedure in User Program Mode.
User Program Mode (Only in On-Chip 128-Kbyte and 64-Kbyte ROM Version)
program data is prepared
transferred to the on-chip
Programming/erasing
Programming/erasing
When programming,
Programming/erasing
procedure program is
RAM and executed
Figure 17.9 Programming/Erasing Overview Flow
FWE = 1 ?
start
end
Yes
No
1. Inputting high level to the FWE pin sets the
2. Programming/erasing is executed only in
3. After programming/erasing is finished, low level
must be input to the FWE pin for protection.
FWE bit to 1.
the on-chip RAM.
Rev. 5.00 Mar. 06, 2009 Page 615 of 770
REJ09B0243-0500

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