DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 131

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Notes: I3 to I0 are interrupt mask bits in the status register (SR) of the CPU
Branch to exception
Save SR to stack
Save PC to stack
handling routine
IRQOUT = high
Read exception
execution state
IRQOUT = low
level to I3 to I0
Copy interrupt
1. IRQOUT is the same signal as the interrupt request signal to the CPU (see figure 6.1).
2. When the accepted interrupt is sensed by edge, a high level is output from the IRQOUT pin at the moment when
3. The IRQOUT pin change timing depends on a frequency dividing ratio between the internal (Iφ) and bus (Bφ)
vector table
User break?
Interrupt?
Program
level 14?
I3 to I0 ≤
Therefore, IRQOUT is output when the request priority level is higher than the level in bits I3–I0 of SR.
the CPU starts interrupt exception processing instead of instruction execution (namely, before saving SR to stack).
However, if the interrupt controller accepts an interrupt with a higher priority than the interrupt just to be accepted
and has output an interrupt request to the CPU, the IRQOUT pin holds low level.
clocks. This flowchart shows that the frequency dividing ratios of the internal (Iφ) and bus (Bφ) clocks are the same.
Yes
Yes
Yes
No
No
No
*
*
1
2
*
*
Figure 6.3 Interrupt Sequence Flowchart
3
3
NMI?
Yes
Yes
No
interrupt?
level 14?
Level 15
I3 to I0 ≤
No
Yes
Yes
No
interrupt?
level 13?
Level 14
I3 to I0 ≤
No
Yes
Yes
Rev. 5.00 Mar. 06, 2009 Page 111 of 770
No
interrupt?
I3 to I0 =
level 0?
Level 1
No
Yes
No
REJ09B0243-0500