DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 336

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Example of Dead Time Compensation Setting Procedure: Figure 9.80 shows an example of
dead time compensation setting procedure by using three counters in channel 5.
Rev. 5.00 Mar. 06, 2009 Page 316 of 770
REJ09B0243-0500
MTU
ch3/4
ch5
TCNT_5 input capture occurs
Complementary PWM mode
Start count operation in
External pulse width
Interrupt processing
Figure 9.80 Example of Dead Time Compensation Setting Procedure
channels 3 to 5
Complementary
PWM output
Dead time
delay input
measurement
Figure 9.81 Example of Motor Control Circuit Configuration
≠
[1]
[2]
[3]
[4] *
[5]
Inverter output
monitor signals
[1] Place channels 3 and 4 in complementary PWM mode. For
[2] Specify the external pulse width measurement function for
[3] Set bits CST3 and CST4 in TSTR and bits CST5U, CST5V,
[4] When the capture condition specified in TIOR is satisfied,
[5] For U-phase dead time compensation, when an interrupt is
Notes: The PFC settings must be completed in advance.
details, refer to section 9.4.8, Complementary PWM Mode.
the target TIOR in channel 5. For details, refer to section
9.4.10, External Pulse Width Measurement.
and CST5W in TSTR2 to 1 to start count operation.
the TCNT_5 value is captured in TGR_5.
generated at the crest (TGIA_3) or trough (TCIV_4) in
complementary PWM mode, read the TGRU_5 value,
calculate the difference in time in TGRB_3, and write the
corrected value to TGRD_3 in the interrupt processing.
For the V phase and W phase, read the TGRV_5 and
TGRW_5 values and write the corrected values to TGRC_4
and TGRD_4, respectively, in the same way as for U-phase
compensation.
The TCNT_5 value should be cleared through the
TCNTCMPCLR setting or by software.
* As an interrupt flag is set under the capture condition
specified in TIOR, do not enable interrupt requests in
TIER_5.
-
DC
U
+
U
U
V
V
V
W
W
W
Motor