DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 85

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit
8 to 6
5 to 3
2 to 0
Bit Name
PFC[2:0]
⎯
MPFC[2:0] 011
Initial
Value
011
011
R/W
R/W
R/W
R/W
Description
Peripheral Clock (Pφ) Frequency Division Ratio
Specify the division ratio of the peripheral clock (Pφ)
frequency with respect to the output frequency of PLL
circuit. If a prohibited value is specified, subsequent
operation is not guaranteed.
000: Setting prohibited
001: ×1/2
010: Setting prohibited
011: ×1/4 (initial value)
100: ×1/8
Other than above: Setting prohibited
Reserved
These bits are always read as B'011. The write value
should always be B'011.
MTU2 Clock (MPφ) Frequency Division Ratio
Specify the division ratio of the MTU2 clock (MPφ)
frequency with respect to the output frequency of PLL
circuit. If a prohibited value is specified, subsequent
operation is not guaranteed.
000: Setting prohibited
001: ×1/2
010: Setting prohibited
011: ×1/4 (initial value)
100: ×1/8
Other than above: Setting prohibited
Rev. 5.00 Mar. 06, 2009 Page 65 of 770
REJ09B0243-0500