DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 230

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

9.3.10
TADCORA_4 and TADCORB_4 are 16-bit readable/writable registers. When the TCNT_4 count
reaches the value in TADCORA_4 or TADCORB_4, a corresponding A/D converter start request
will be issued.
TADCORA_4 and TADCORB_4 are initialized to H'FFFF.
Initial value:
9.3.11
TADCOBRA_4 and TADCOBRB_4 are 16-bit readable/writable registers. When the crest or
trough of the TCNT_4 count is reached, these register values are transferred to TADCORA_4 and
TADCORB_4, respectively.
TADCOBRA_4 and TADCOBRB_4 are initialized to H'FFFF.
Initial value:
Rev. 5.00 Mar. 06, 2009 Page 210 of 770
REJ09B0243-0500
Note:
Note:
R/W:
R/W:
Bit:
Bit:
TADCORA_4 and TADCORB_4 must not be accessed in eight bits; they should always be accessed in 16 bits.
TADCOBRA_4 and TADCOBRB_4 must not be accessed in eight bits; they should always be accessed in 16 bits.
R/W
R/W
Timer A/D Converter Start Request Cycle Set Registers (TADCORA_4 and
TADCORB_4)
Timer A/D Converter Start Request Cycle Set Buffer Registers (TADCOBRA_4
and TADCOBRB_4)
15
15
1
1
R/W
R/W
14
14
1
1
R/W
R/W
13
13
1
1
R/W
R/W
12
12
1
1
R/W
R/W
11
11
1
1
R/W
R/W
10
10
1
1
R/W
R/W
9
1
9
1
R/W
R/W
8
1
8
1
R/W
R/W
7
1
7
1
R/W
R/W
6
1
6
1
R/W
R/W
5
1
5
1
R/W
R/W
4
1
4
1
R/W
R/W
3
1
3
1
R/W
R/W
2
1
2
1
R/W
R/W
1
1
1
1
R/W
R/W
0
1
0
1