DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 608

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 17.4 (1)
Notes: 1. The bits except the SCO bit are read-only bits. The SCO bit is a programming-only bit.
Table 17.4 (2)
Note:
Rev. 5.00 Mar. 06, 2009 Page 588 of 770
REJ09B0243-0500
Register Name
Flash code control and status
register
Flash program code select register
Flash erase code select register
Flash key code register
Flash transfer destination address
register
Name
Download pass/fail result
Flash pass/fail result
Flash multipurpose address
area
Flash multipurpose data
destination area
Flash erase block select
Flash program and erase
frequency control
Flash user branch address
set parameter
2. The initial value of the FWE bit is 0 when the FWE pin goes low.
3. All registers can be accessed only in bytes.
* One byte of the start address in the on-chip RAM area specified by FTDAR is valid.
(The value, which can be read is always 0.)
The initial value of the FWE bit is 1 when the FWE pin goes high.
Register Configuration
Parameter Configuration
Abbreviation
DPFR
FPFR
FMPAR
FMPDR
FEBS
FPEFEQ
FUBRA
FPCS
FECS
Abbreviation*
FCCS
FKEY
FTDAR
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
3
R/W
R, W*
R/W
R/W
R/W
R/W
Initial
Value
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
1
Initial
Value
H'00*
H'80*
H'00
H'00
H'00
H'00
2
2
Address
On-chip RAM* 8, 16, 32
R0 of CPU
R5 of CPU
R4 of CPU
R4 of CPU
R4 of CPU
R5 of CPU
Address
H'FFFFCC00
H'FFFFCC01
H'FFFFCC02
H'FFFFCC04
H'FFFFCC06
Access
Size
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
Access
Size
8
8
8
8
8