DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 617

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

The programming/erasing interface parameters are used in the following four items.
1. Download control
2. Initialization before programming or erasing
3. Programming
4. Erasing
These items use different parameters. The correspondence table is shown in table 17.6.
The processing results of initialization, programming, and erasing are returned, but the bit contents
have different meanings according to the processing program. See the description of FPFR for
each processing.
Table 17.6 Usable Parameters and Target Modes
Note:
Name of
Parameter
Download pass/fail
result
Flash pass/fail
result
Flash
programming/
erasing frequency
control
Flash user branch
address set
Flash multipurpose
address area
Flash multipurpose
data destination
area
Flash erase block
select
* One byte of start address of download destination specified by FTDAR
Abbrevia-
tion
DPFR
FPFR
FPEFEQ
FUBRA
FMPAR
FMPDR
FEBS
Down-
load
√
—
—
—
—
—
—
Initiali-
zation
—
√
√
√
—
—
—
Pro-
gram-
ming Erasure R/W
—
√
—
—
√
√
—
—
√
—
—
—
—
√
Rev. 5.00 Mar. 06, 2009 Page 597 of 770
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial
Value
Undefined On-chip
Undefined R0 of CPU
Undefined R4 of CPU
Undefined R5 of CPU
Undefined R5 of CPU
Undefined R4 of CPU
Undefined R4 of CPU
REJ09B0243-0500
Allocation
RAM*