DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 12

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7.3
7.4
Section 8 Bus State Controller (BSC) .................................................................149
8.1
8.2
8.3
8.4
Section 9 Multi-Function Timer Pulse Unit 2 (MTU2).......................................153
9.1
9.2
9.3
Rev. 5.00 Mar. 06, 2009 Page x of xviii
REJ09B0243-0500
7.2.7
7.2.8
7.2.9
7.2.10 Break Bus Cycle Register B (BBRB) ................................................................... 127
7.2.11 Break Control Register (BRCR) ........................................................................... 129
7.2.12 Execution Times Break Register (BETR)............................................................. 133
7.2.13 Branch Source Register (BRSR)........................................................................... 134
7.2.14 Branch Destination Register (BRDR)................................................................... 135
Operation ........................................................................................................................... 136
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.3.6
7.3.7
Usage Notes ....................................................................................................................... 146
Features.............................................................................................................................. 149
Address Map ...................................................................................................................... 149
Access to on-chip FLASH and on-chip RAM ................................................................... 149
Access to on-chip Peripheral I/O Register ......................................................................... 150
Features.............................................................................................................................. 153
Input/Output Pins............................................................................................................... 159
Register Descriptions ......................................................................................................... 160
9.3.1
9.3.2
9.3.3
9.3.4
9.3.5
9.3.6
9.3.7
9.3.8
9.3.9
9.3.10 Timer A/D Converter Start Request Cycle Set Registers
Break Address Mask Register B (BAMRB) ......................................................... 124
Break Data Register B (BDRB) ............................................................................ 125
Break Data Mask Register B (BDMRB)............................................................... 126
Flow of the User Break Operation ........................................................................ 136
Break on Instruction Fetch Cycle ......................................................................... 137
Break on Data Access Cycle................................................................................. 137
Sequential Break ................................................................................................... 139
Value of Saved Program Counter ......................................................................... 139
PC Trace ............................................................................................................... 140
Usage Examples.................................................................................................... 141
Timer Control Register (TCR).............................................................................. 164
Timer Mode Register (TMDR)............................................................................. 168
Timer I/O Control Register (TIOR) ...................................................................... 171
Timer Compare Match Clear Register (TCNTCMPCLR) .................................... 190
Timer Interrupt Enable Register (TIER)............................................................... 191
Timer Status Register (TSR)................................................................................. 196
Timer Buffer Operation Transfer Mode Register (TBTM)................................... 204
Timer Input Capture Control Register (TICCR) ................................................... 205
Timer A/D Converter Start Request Control Register (TADCR) ......................... 207
(TADCORA_4 and TADCORB_4)...................................................................... 210