DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 664

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

The received data are checked in the following ways.
1. Input frequency
2. Multiplier
3. Operating frequency
4. Bit rate
Rev. 5.00 Mar. 06, 2009 Page 644 of 770
REJ09B0243-0500
The value of the received input frequency is checked to see if it is within the range of the
minimum and maximum values of input frequency for the selected clock mode of the selected
device. A value outside the range generates an input frequency error.
The value of the received multiplier is checked to see if it matches a multiplier or divisor that
is available for the selected clock mode of the selected device. A value that does not match an
available ratio generates a frequency multiplier error.
The operating frequency is calculated from the received input frequency and the frequency
multiplier or divisor. The input frequency is the frequency of the clock signal supplied to the
LSI, while the operating frequency is the frequency at which the LSI is actually driven. The
following formulae are used for this calculation.
The calculated operating frequency is checked to see if it is within the range of the minimum
and maximum values of the operating frequency for the selected clock mode of the selected
device. A value outside the range generates an operating frequency error.
From the peripheral operating frequency (Pφ) and the bit rate (B), the value (= n) of the clock
select bits (CKS) in the serial mode register (SCSMR) and the value (= N) of the bit rate
register (SCBRR) are calculated, after which the error in the bit rate is calculated. This error is
checked to see if it is smaller than 4%. A result greater than or equal to 4% generates a bit rate
selection error. The following formula is use to calculate the error.
H'26: Frequency multiplier error (the specified multiplier does not match an available one).
H'27: Operating frequency error (the specified operating frequency is not within the range
Operating frequency = input frequency × multiplier, or
Operating frequency = input frequency / divisor
Error (%) = [
from the minimum to the maximum value).
(N + 1) × B × 64 × 2
Pφ × 10
6
2n-1
] - 1
× 100