DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 508
DF71251AD50FPV
Manufacturer Part Number
DF71251AD50FPV
Description
MCU RISC FLASH 32K 8K 64LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH Tinyr
Datasheet
1.DF71243N50FPV.pdf
(794 pages)
Specifications of DF71251AD50FPV
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
SCI
Peripherals
POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF71251AD50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 508 of 794
- Download datasheet (5Mb)
Rev. 5.00 Mar. 06, 2009 Page 488 of 770
REJ09B0243-0500
Bit
11 to 8
Bit Name
TRG01S[3:0] 0000
Initial
Value
R/W
R/W
Description
A/D Trigger 0 Group 1 Select 3 to 0
Select an external trigger or MTU2 trigger to start A/D
conversion for group 1 when A/D module 0 is in 2-
channel scan mode.
0000: External trigger pin (ADTRG) input
0001: TRGA input capture/compare match for each
0010: MTU2 channel 0 compare match (TRG0N)
0011: MTU2 A/D conversion start request delaying
0100: MTU2 A/D conversion start request delaying
0101: Setting prohibited
0110: Setting prohibited
0111: Setting prohibited
1xxx: Setting prohibited
When switching the selector, first clear the ADST bit in
the A/D control register (ADCR) to 0.
Specify different trigger sources for the group 0 and
group 1 conversion requests so that a group 0
conversion request is not generated simultaneously
with a group 1 conversion request in 2-channel scan
mode.
MTU2 channel or TCNT_4 underflow (trough) in
complementary PWM mode (TRGAN)
(TRG4AN)
(TRG4BN)
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