DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 625

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(3.3) Flash pass/fail parameter (FPFR: general register R0 of CPU)
Initial value:
Initial value:
Bit
31 to 7 ⎯
6
This parameter indicates the return value of the program processing result.
R/W:
R/W:
Bit:
Bit:
Bit Name
MD
R/W
R/W
31
15
-
-
-
-
R/W
R/W
30
14
-
-
-
-
R/W
R/W
Initial
Value
Undefined R/W
Undefined R/W
29
13
-
-
-
-
R/W
R/W
28
12
-
-
-
-
R/W
R/W
27
11
-
-
-
-
R/W
R/W
R/W
26
10
-
-
-
-
Description
Unused
Return 0.
Programming Mode Related Setting Error Detect
Returns the check result of whether the signal input to
the FWE pin is high and whether the error protection
state is not entered.
When a low-level signal is input to the FWE pin or the
error protection state is entered, 1 is written to this bit.
The input level to the FWE pin and the error protection
state can be confirmed with the FWE bit (bit 7) and the
FLER bit (bit 4) in FCCS, respectively. For conditions to
enter the error protection state, see section 17.6.3,
Error Protection.
0: FWE and FLER settings are normal (FWE = 1, FLER
1: FWE = 0 or FLER = 1, and programming cannot be
R/W
R/W
25
9
-
-
-
-
= 0)
performed
R/W
R/W
24
8
-
-
-
-
R/W
R/W
23
7
-
-
-
-
R/W
R/W
MD
22
Rev. 5.00 Mar. 06, 2009 Page 605 of 770
6
-
-
-
R/W
R/W
21
EE
5
-
-
-
R/W
R/W
20
FK
4
-
-
-
R/W
R/W
19
3
-
-
-
-
REJ09B0243-0500
R/W
R/W
WD
18
2
-
-
-
R/W
R/W
17
WA
1
-
-
-
R/W
R/W
16
SF
0
-
-
-