DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 220

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

• TSR2_0
Notes: 1. Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.
Rev. 5.00 Mar. 06, 2009 Page 200 of 770
REJ09B0243-0500
Bit
7, 6
5 to 2
1
0
2. If another flag setting condition occurs before writing 0 to the bit after reading it as 1, the
Bit Name
—
—
TGFF
TGFE
flag will not be cleared by writing 0 to it once. In this case, read the bit as 1 again and
write 0 to it.
Note:
1.
Initial value:
Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.
0
Initial
Value
All 1
All 0
0
R/W:
Bit:
R
7
1
-
R/W
R
R
R/(W)*
R/(W)*
R
6
1
-
1
1
Description
Reserved
These bits are always read as 1. The write value
should always be 1.
Reserved
These bits are always read as 0. The write value
should always be 0.
Compare Match Flag F
Status flag that indicates the occurrence of compare
match between TCNT_0 and TGRF_0.
[Setting condition]
•
[Clearing condition]
•
Compare Match Flag E
Status flag that indicates the occurrence of compare
match between TCNT_0 and TGRE_0.
[Setting condition]
•
[Clearing condition]
•
R
5
0
-
When TCNT_0 = TGRF_0 and TGRF_0 is
functioning as compare register
When 0 is written to TGFF after reading TGFF =
1*
When TCNT_0 = TGRE_0 and TGRE_0 is
functioning as compare register
When 0 is written to TGFE after reading TGFE =
1*
R
2
2
4
0
-
R
3
0
-
R
2
0
-
R/(W)*
TGFF
1
0
1
R/(W)*
TGFE
0
0
1