DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 623

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(3) Programming Execution
(3.1) Flash multipurpose address area parameter (FMPAR: general register R5 of CPU)
Initial value:
Initial value:
When flash memory is programmed, the programming destination address and programming
data on the user MAT must be passed to the programming program in which the program data
is downloaded.
1. The start address of the programming destination on the user MAT is set in general register
2. The program data for the user MAT must be prepared in the consecutive area. The program
This parameter indicates the start address of the programming destination on the user MAT.
When an address in an area other than the flash memory space is set, an error occurs.
The start address of the programming destination must be at the 128-byte boundary. If this
boundary condition is not satisfied, an error occurs. The error occurrence is indicated by the
WA bit (bit 1) in FPFR.
R/W:
R/W:
Bit:
Bit:
R5 of the CPU. This parameter is called FMPAR (flash multipurpose address area
parameter).
Since the program data is always in 128-byte units, the lower eight bits (MOA7 to MOA0)
must be H'00 or H'80 as the boundary of the programming start address on the user MAT.
data must be in the consecutive space which can be accessed by using the MOV.B
instruction of the CPU and is not the flash memory space.
When data to be programmed does not satisfy 128 bytes, the 128-byte program data must
be prepared by embedding the dummy code (H'FF).
The start address of the area in which the prepared program data is stored must be set in
general register R4. This parameter is called FMPDR (flash multipurpose data destination
area parameter).
For details on the programming procedure, see section 17.5.2, User Program Mode (Only
in On-Chip 128-Kbyte and 64-Kbyte ROM Version).
MOA31 MOA30 MOA29 MOA28 MOA27 MOA26 MOA25 MOA24 MOA23 MOA22 MOA21 MOA20 MOA19 MOA18 MOA17 MOA16
MOA15 MOA14 MOA13 MOA12 MOA11 MOA10 MOA9 MOA8 MOA7 MOA6 MOA5 MOA4 MOA3 MOA2 MOA1 MOA0
R/W
R/W
31
15
-
-
R/W
R/W
30
14
-
-
R/W
R/W
29
13
-
-
R/W
R/W
28
12
-
-
R/W
R/W
27
11
-
-
R/W
R/W
26
10
-
-
R/W
R/W
25
9
-
-
R/W
R/W
24
8
-
-
R/W
R/W
23
7
-
-
R/W
R/W
22
Rev. 5.00 Mar. 06, 2009 Page 603 of 770
6
-
-
R/W
R/W
21
5
-
-
R/W
R/W
20
4
-
-
R/W
R/W
19
3
-
-
REJ09B0243-0500
R/W
R/W
18
2
-
-
R/W
R/W
17
1
-
-
R/W
R/W
16
0
-
-