DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 231

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

9.3.12
The TCNT counters are 16-bit readable/writable counters. The MTU2 has eight TCNT counters,
one each for channels 0 to 4 and three (TCNTU_5, TCNTV_5, and TCNTW_5) for channel 5.
The TCNT counters are initialized to H'0000 by a reset.
Initial value:
9.3.13
The TGR registers are 16-bit readable/writable registers. The MTU2 has 21 TGR registers, six for
channel 0, two each for channels 1 and 2, four each for channels 3 and 4, and three for channel 5.
TGRA, TGRB, TGRC, and TGRD function as either output compare or input capture registers.
TGRC and TGRD for channels 0, 3, and 4 can also be designated for operation as buffer registers.
TGR buffer register combinations are TGRA and TGRC, and TGRB and TGRD.
TGRE_0 and TGRF_0 function as compare registers. When the TCNT_0 count matches the
TGRE_0 value, an A/D converter start request can be issued. TGRF can also be designated for
operation as a buffer register. TGR buffer register combination is TGRE and TGRF.
TGRU_5, TGRV_5, and TGRW_5 function as compare match, input capture, or external pulse
width measurement registers.
Initial value:
Note:
Note:
R/W:
R/W:
Bit:
Bit:
The TCNT counters must not be accessed in eight bits; they should always be accessed in 16 bits.
The TGR registers must not be accessed in eight bits; they should always be accessed in 16 bits.
TGR registers are initialized to H'FFFF.
R/W
R/W
Timer Counter (TCNT)
Timer General Register (TGR)
15
15
0
1
R/W
R/W
14
14
0
1
R/W
R/W
13
13
0
1
R/W
R/W
12
12
0
1
R/W
R/W
11
11
0
1
R/W
R/W
10
10
0
1
R/W
R/W
9
0
9
1
R/W
R/W
8
0
8
1
R/W
R/W
7
0
7
1
R/W
R/W
Rev. 5.00 Mar. 06, 2009 Page 211 of 770
6
0
6
1
R/W
R/W
5
0
5
1
R/W
R/W
4
0
4
1
R/W
R/W
3
0
3
1
REJ09B0243-0500
R/W
R/W
2
0
2
1
R/W
R/W
1
0
1
1
R/W
R/W
0
0
0
1