DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 279

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

9.4.6
In phase counting mode, the phase difference between two external clock inputs is detected and
TCNT is incremented/decremented accordingly. This mode can be set for channels 1 and 2.
When phase counting mode is set, an external clock is selected as the counter input clock and
TCNT operates as an up/down-counter regardless of the setting of bits TPSC0 to TPSC2 and bits
CKEG0 and CKEG1 in TCR. However, the functions of bits CCLR0 and CCLR1 in TCR, and of
TIOR, TIER, and TGR, are valid, and input capture/compare match and interrupt functions can be
used.
This can be used for two-phase encoder pulse input.
If overflow occurs when TCNT is counting up, the TCFV flag in TSR is set; if underflow occurs
when TCNT is counting down, the TCFU flag is set.
The TCFD bit in TSR is the count direction flag. Reading the TCFD flag reveals whether TCNT is
counting up or down.
Table 9.47 shows the correspondence between external clock pins and channels.
Table 9.47 Phase Counting Mode Clock Input Pins
Example of Phase Counting Mode Setting Procedure: Figure 9.29 shows an example of the
phase counting mode setting procedure.
Channels
When channel 1 is set to phase counting mode
When channel 2 is set to phase counting mode
Phase Counting Mode
Figure 9.29 Example of Phase Counting Mode Setting Procedure
<Phase counting mode>
Select phase counting
Phase counting mode
Start count
mode
[1]
[2]
[1] Select phase counting mode with bits
[2] Set the CST bit in TSTR to 1 to start
MD3 to MD0 in TMDR.
the count operation.
A-Phase
TCLKA
TCLKC
Rev. 5.00 Mar. 06, 2009 Page 259 of 770
External Clock Pins
B-Phase
TCLKB
TCLKD
REJ09B0243-0500