DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 501

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

13.3.1
ADDRs are 16-bit read-only registers. The conversion result for each analog input channel is
stored in ADDR with the corresponding number. (For example, the conversion result of AN4 is
stored in ADDR4.)
The converted 10-bit data is stored in bits 6 to 15. The lower 6 bits are always read as 0.
The data bus between the CPU and the A/D converter is 16 bits wide. When reading from ADDR,
access must be performed in words. The initial value of ADDR is H'0000.
Initial value:
13.3.2
ADCSR for each module controls A/D conversion operations.
Initial value:
Bit
15
Note:
R/W:
R/W:
Bit:
Bit:
*
Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.
R/(W)* R/W
Bit Name
ADF
ADF
A/D Data Registers 0 to 7 (ADDR0 to ADDR7)
A/D Control/Status Registers_0 and _1 (ADCSR_0 and ADCSR_1)
15
15
R
0
0
ADIE
14
14
R
0
0
13
13
Initial
Value
0
R
R
0
0
-
12
12
R
R
0
0
-
TRGE
R/W
11
11
R
0
0
R/W
R/(W)*
10
10
R
R
0
0
-
CONADF
R/W
Description
A/D End Flag
A status flag that indicates the end of A/D conversion.
[Setting conditions]
•
•
[Clearing condition]
•
R
9
0
9
0
When A/D conversion ends in single mode
When A/D conversion ends on all specified
channels in scan mode
When 0 is written after reading ADF = 1
R/W
STC
R
8
0
8
0
R/W
R
7
0
7
0
CKSL[1:0]
R/W
Rev. 5.00 Mar. 06, 2009 Page 481 of 770
6
0
R
6
0
R/W
5
0
R
5
0
-
ADM[1:0]
R/W
R
4
0
4
0
-
ADCS
R/W
R
3
0
3
0
-
REJ09B0243-0500
R/W
2
0
R
2
0
-
CH[2:0]
R/W
1
0
R
1
0
-
R/W
0
0
R
0
0
-