DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 290

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 9.55 Register Settings for Complementary PWM Mode
Note:
Rev. 5.00 Mar. 06, 2009 Page 270 of 770
REJ09B0243-0500
Channel
3
4
Timer dead time data register
(TDDR)
Timer cycle data register
(TCDR)
Timer cycle buffer register
(TCBR)
Subcounter (TCNTS)
Temporary register 1 (TEMP1)
Temporary register 2 (TEMP2)
Temporary register 3 (TEMP3)
* Access can be enabled or disabled according to the setting of bit 0 (RWE) in TRWER
(timer read/write enable register).
Counter/Register
TCNT_3
TGRA_3
TGRB_3
TGRC_3
TGRD_3
TCNT_4
TGRA_4
TGRB_4
TGRC_4
TGRD_4
Description
Start of up-count from value set
PWM output 1/TGRB_3 buffer
PWM output 2/TGRA_4 buffer
PWM output 3/TGRB_4 buffer
in dead time register
Set TCNT_3 upper limit value
(1/2 carrier cycle + dead time)
PWM output 1 compare register
TGRA_3 buffer register
register
Up-count start, initialized to
H'0000
PWM output 2 compare register
PWM output 3 compare register
register
register
Set TCNT_4 and TCNT_3 offset
value (dead time value)
Set TCNT_4 upper limit value
(1/2 carrier cycle)
TCDR buffer register
Subcounter for dead time
generation
PWM output 1/TGRB_3
temporary register
PWM output 2/TGRA_4
temporary register
PWM output 3/TGRB_4
temporary register
Read/Write from CPU
Maskable by TRWER
setting*
Maskable by TRWER
setting*
Maskable by TRWER
setting*
Always readable/writable
Always readable/writable
Maskable by TRWER
setting*
Maskable by TRWER
setting*
Maskable by TRWER
setting*
Always readable/writable
Always readable/writable
Maskable by TRWER
setting*
Maskable by TRWER
setting*
Always readable/writable
Read-only
Not readable/writable
Not readable/writable
Not readable/writable