DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 489

MCU RISC FLASH 32K 8K 64LQFP

DF71251AD50FPV

Manufacturer Part Number
DF71251AD50FPV
Description
MCU RISC FLASH 32K 8K 64LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH Tinyr
Datasheet

Specifications of DF71251AD50FPV

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
SCI
Peripherals
POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF71251AD50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
No
No
No
Figure 12.18 Sample Multiprocessor Serial Reception Flowchart (1)
Read receive data in SCRDR
Read receive data in SCRDR
Set MPIE bit in SCSCR to 1
Read ORER and FER flags
Read ORER and FER flags
Clear RE bit in SCSCR to 0
Read RDRF flag in SCSSR
Read RDRF flag in SCSSR
FER = 1? or ORER = 1?
FER = 1? or ORER = 1?
All data received?
This station’s ID?
Start reception
Initialization
RDRF = 1?
RDRF = 1?
in SCSSR
in SCSSR
<End>
Yes
Yes
Yes
Yes
No
No
Yes
No
Yes
Error processing
[3]
[1]
[2]
(Continued on
next page)
[4]
[5]
[1]
[2]
[3]
[4]
[5]
SCI initialization:
Set the RXD pin using the PFC.
ID reception cycle:
Set the MPIE bit in SCSCR to 1.
SCI status check, ID reception and
comparison:
Read SCSSR and check that the RDRF flag is
set to 1, then read the receive data in SCRDR
and compare it with this station’s ID.
If the data is not this station’s ID, set the MPIE
bit to 1 again, and clear the RDRF flag to 0.
If the data is this station’s ID, clear the RDRF
flag to 0.
SCI status check and data reception:
Read SCSSR and check that the RDRF flag is
set to 1, then read the data in SCRDR.
Receive error processing and break detection:
If a receive error occurs, read the ORER and
FER flags in SCSSR to identify the error.
After performing the appropriate error
processing, ensure that the ORER and FER
flags are all cleared to 0.
Reception cannot be resumed if either of
these flags is set to 1.
In the case of a framing error, a break can be
detected by reading the RXD pin value.
Rev. 5.00 Mar. 06, 2009 Page 469 of 770
REJ09B0243-0500

Related parts for DF71251AD50FPV