DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 271

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Cascaded Operation Example (b) in SH7125: Figure 9.22 illustrates the operation when
TCNT_1 and TCNT_2 have been cascaded and the I2AE bit in TICCR has been set to 1 to include
the TIOC2A pin in the TGRA_1 input capture conditions. In this example, the IOA0 to IOA3 bits
in TIOR_1 have selected the TIOC1A rising edge for the input capture timing while the IOA0 to
IOA3 bits in TIOR_2 have selected the TIOC2A rising edge for the input capture timing.
Under these conditions, the rising edge of both TIOC1A and TIOC2A is used for the TGRA_1
input capture condition. For the TGRA_2 input capture condition, the TIOC2A rising edge is used.
TGRA_1
TGRA_2
TCNT_1
TIOC1A
TIOC2A
H'FFFF
H'C256
H'6128
H'0000
TCNT_2 value
TCLKC
TCLKD
TCNT_2
TCNT_1
FFFD
Figure 9.22 Cascaded Operation Example (b)
Figure 9.21 Cascaded Operation Example (a)
H'0512
0000
FFFE
As I1AE in TICCR is 0, data is not captured in TGRA_2 at the TIOC1A input timing.
FFFF
H'0512
0000
H'0513
0001
0001
0002
Rev. 5.00 Mar. 06, 2009 Page 251 of 770
H'0514
H'C256
H'0513
0001
0000
FFFF
REJ09B0243-0500
0000
Time