HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1004

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 27
27.4.4
The A/D converter has a built-in sample-and-hold circuit. The A/D converter samples the analog
input at a time t
conversion timing. Table 27.3 indicates the A/D conversion time.
As indicated in figure 27.5, the A/D conversion time includes t
length of t
time therefore varies within the ranges indicated in table 27.3.
In multi mode and scan mode, the values given in table 27.3 apply to the first conversion. In the
second and subsequent conversions the conversion the conversion time is fixed at 512 states
(fixed) when CKS1 = 1 and CKS0 = 0, 256 states (fixed) when CKS1 = 0 and CKS0 = 1, and 128
states (fixed) when CKS1 = 0 and CKS0 = 0.
Rev. 3.00
REJ09B0033-0300
Input Sampling and A/D Conversion Time
D
Jan. 18, 2008
varies depending on the timing of the write access to ADCSR. The total conversion
A/D Converter
D
t
t
t
Notes:
D
SPL
CONV
after the ADST bit is set to 1, then starts conversion. Figure 27.5 shows the A/D
Input sampling
A/D conversion start delay
Input sampling time
A/D conversion time
1. ADCSR write cycle
2. ADCSR address
Page 942 of 1458
Address
Figure 27.5
timing
signal
Write
ADF
*
*
1
2
t
D
A/D Conversion Timing
t
SPL
t
CONV
D
and the input sampling time. The

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