HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 225

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Notes: 1. For details, refer to the SH-3/SH-3E/SH3-DSP Software Manual.
Instruction Code
MSB
1000 01MD Rm
1000 10MD imm/disp
1000 11MD imm/disp
1001 Rn
1010 disp
1011 disp
1100 00MD imm/disp
1100 01MD disp
1100 10MD imm
1100 11MD imm
1101 Rn
1110 Rn
1111 00**
1111 01**
1111 10**
1111 11**
2. Instructions in the hatched areas are DSP extended instructions. These instructions
can be executed only when the DSP bit in the SR register is set to 1.
disp
disp
imm
********
********
********
********
LSB MD: 00
disp
Fx: 0000
MOV.B
@(disp:4, Rm), R0
CMP/EQ
LDRS
MOV.W @ (disp : 8, PC), Rn
BRA
BSR
MOV.B
R0, @(disp: 8, GBR)
MOV.B
@(disp: 8, GBR), R0
TST
TST.B
#imm: 8, @(R0, GBR)
MOV.L
MOV
MOVX.W, MOVY.W
MOVS.W, MOVS.L
MOVX.W, MOVY.W
bit instruction )
#imm:8, R0
@(disp:8,PC)
disp : 12
disp: 12
#imm: 8, R0
@(disp: 8, PC), Rn
#imm:8, Rn
Double data transfer instruction
Single data transfer instruction
Double data transfer instruction, with DSP parallel operation instruction (32-
Fx: 0001
MD: 01
MOV.W
@(disp: 4, Rm), R0
BT
BT/S
MOV.W
R0, @(disp: 8, GBR)
MOV.W
@(disp: 8, GBR), R0
AND
AND.B
#imm: 8, @(R0, GBR)
disp: 8
#imm: 8, R0
disp: 8
Rev. 3.00 Jan. 18, 2008 Page 163 of 1458
Fx: 0010
MD: 10
LDRE
MOV.L
R0, @(disp: 8, GBR)
MOV.L
@(disp: 8, GBR), R0
XOR
XOR.B
#imm: 8, @(R0, GBR)
@(disp:8,PC)
#imm: 8, R0
Section 3 DSP Operating Unit
Fx: 0011 to 1111
MD: 11
BF
BF/S
TRAPA
MOVA
@(disp: 8, PC), R0
OR
OR.B
#imm: 8, @(R0, GBR)
REJ09B0033-0300
#imm: 8, R0
#imm: 8
disp: 8
disp: 8