HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 43

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Figure 21.20 Transmit and Receive Timing (16-Bit Stereo Data).............................................. 733
Figure 21.21 Frame Length (32-Bit)........................................................................................... 734
Section 22 Analog Front End Interface (AFEIF)
Figure 22.1 Block Diagram of AFE Interface............................................................................. 735
Figure 22.2 FIFO Interrupt Timing............................................................................................. 748
Figure 22.3 Ringing Interrupt Occurrence Timing ..................................................................... 749
Figure 22.4 Interrupt Generator .................................................................................................. 749
Figure 22.5 AFE Serial Interface................................................................................................ 750
Figure 22.6 AFE Control Sequence............................................................................................ 751
Figure 22.7 DAA Block Diagram............................................................................................... 752
Figure 22.8 Ringing Detect Sequence ........................................................................................ 753
Section 23 USB Pin Multiplex Controller
Figure 23.1 Block Diagram of USB PIN Multiplexer ................................................................ 755
Figure 23.2 Example 1 of Transceiver Connection for USB Function Controller
Figure 23.3 Example 2 of Transceiver Connection for USB function Controller
Figure 23.4 Example 1 of Transceiver Connection for USB Host Controller
Figure 23.5 Example 2 of Transceiver Connection for USB Host Controller
Section 25 USB Function Controller (USBF)
Figure 25.1 Block Diagram of USBF ......................................................................................... 804
Figure 25.2 Example of Endpoint Configuration........................................................................ 835
Figure 25.3 Cable Connection Operation ................................................................................... 837
Figure 25.4 Cable Disconnection Operation............................................................................... 838
Figure 25.5 Transfer Stages in Control Transfer ........................................................................ 839
Figure 25.6 Setup Stage Operation ............................................................................................. 840
Figure 25.7 Data Stage (Control-In) Operation .......................................................................... 841
Figure 25.8 Data Stage (Control-Out) Operation........................................................................ 842
Figure 25.9 Status Stage (Control-In) Operation ........................................................................ 843
Figure 25.10 Status Stage (Control-Out) Operation ................................................................... 844
Figure 25.11 EP1 Bulk-Out Transfer Operation......................................................................... 845
Figure 25.12 EP2 Bulk-In Transfer Operation............................................................................ 846
Figure 25.13 EP3 Interrupt-In Transfer Operation ..................................................................... 848
Figure 25.14 EP4 Isochronous-Out Transfer Operation (SOF is Normal).................................. 849
Figure 25.15 EP4 Isochronous-Out Transfer Operation (SOF is Broken) .................................. 850
(On-Chip Transceiver is Used)................................................................................ 759
(On-Chip Transceiver is not Used).......................................................................... 760
(On-Chip Transceiver is Used)................................................................................ 762
(On-Chip Transceiver is not Used).......................................................................... 763
Rev. 3.00 Jan. 18, 2008 Page xliii of lxii