HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 919

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

the internal status bit to be cleared with a Clear Feature command (2-1, 2-2, and 2-3 in figure
25.16).
(1) Transition from normal operation to stall
(2) When Clear Feature is sent after EPSTL is cleared
(3) When Clear Feature is sent before EPSTL is cleared to 0
Note: The CTLR/ASCE bit should be set to 1 before
(1-2)
(1-3)
(2-3)
(1-1)
(2-1)
(2-2)
(3-1)
(1-4)
Transaction request
STALL handshake
Transaction request
STALL handshake
Clear Feature command
Clear Feature command
STALL handshake
the EPnSTL bit (each stall bit) in EPSTL is set to 1.
Figure 25.18
USB
Internal status bit
Internal status bit
Internal status bit
Internal status bit
Internal status bit
Internal status bit
Internal status bit
Internal status bit
0 → 1
0 → 1
1 → 0
1 → 0
0
0
1
1
Normal status restored
Forcible Stall by Application
To (2-1) or (3-1)
To 2 of (2-1)
Reference
To (1-2)
Stall
Stall
EPnSTL
EPnSTL
EPnSTL
EPnSTL
EPnSTL
EPnSTL
EPnSTL
EPnSTL
0 → 1
1 → 0
Section 25
1
1
1
0
0
1
Rev. 3.00 Jan. 18, 2008 Page 857 of 1458
1. 1 set in CTLR/ASCE
2. 1 set in EPnSTL
3. EPnSTL cleared to 0
4. Internal status bit set to 1
5. Transmission of STALL
USB Function Controller (USBF)
1. 1 written to EPnSTL
1. IN/OUT token
2. EPnSTL referenced
1. 0 set in CTLR/ASCE
2. 1 set in EPnSTL
3. Internal status bit set to 1
4. Transmission of STALL
1. EPnSTL cleared to
2. IN/OUT token
3. Internal status bit
4. EPnSTL not
5. Internal status bit
1. Transmission of
1. Internal status bit
1. Internal status bit
2. EPnSTL not
automatically
handshake
by application
received from host
handshake
0 by application
received from host
already set to 1
referenced
not changed
STALL handshake
cleared to 0
cleared to 0
changed
REJ09B0033-0300