HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 498

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 10
Direct Memory Access Controller (DMAC)
Figure 10.6 shows an example of DMA transfer timing in dual address mode.
CKIO
Transfer source
Transfer destination
A25 to A0
address
address
CSn
D31 to D0
RD
WEn
DACKn
(Active-low)
Data read cycle
Data write cycle
(1st cycle)
(2nd cycle)
Note: In transfer between external memories, with DACK output in the read cycle,
DACK output timing is the same as that of CSn.
Figure 10.6
Example of DMA Transfer Timing in Dual Mode
(Source: Ordinary Memory, Destination: Ordinary Memory)
Rev. 3.00 Jan. 18, 2008 Page 436 of 1458
REJ09B0033-0300

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