HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 509

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
When an 8-bit or 16-bit external device is accessed in longword units, or when an 8-bit external
device is accessed in word units, the DACK output is divided because of the data alignment. This
example is illustrated in figure 10.18.
Figure 10.18
(No Wait, Idle Cycle 1, Longword Access to 16-Bit Device)
(Active-low)
Note: The DACK is asserted for the last transfer unit
Address
DACKn
WAIT
CKIO
WEn
of the DMA transfer. When the transfer unit is
divided into several bus cycles and the CSn is
negated between bus cycles, the DACK is also
divided.
Data
CSn
RD
Example of BSC Ordinary Memory Access
T1
T2
Section 10
Taw
T1
Rev. 3.00 Jan. 18, 2008 Page 447 of 1458
Direct Memory Access Controller (DMAC)
T2
REJ09B0033-0300

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