HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 735

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
No
No
No
Clear TRS in ICCR1 to 0
Slave transmit mode
Read TDRE in ICSR
Read TEND in ICSR
Clear TEND in ICSR
Dummy read ICDRR
Clear TDRE in ICSR
Clear AAS in ICSR
Write transmit data
Write transmit data
TEND=1 ?
TDRE=1 ?
Figure 20.16
in ICDRT
in ICDRT
byte?
End
Last
Yes
Yes
Yes
Sample Flowchart for Slave Transmit Mode
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[1] Clear the AAS flag.
[2] Set transmit data for ICDRT (except for the last data).
[3] Wait for ICDRT empty.
[4] Set the last byte of transmit data.
[5] Wait for the last byte to be transmitted.
[6] Clear the TEND flag .
[7] Set slave receive mode.
[8] Dummy-read ICDRR to release the SCL line.
[9] Clear the TDRE flag.
Rev. 3.00 Jan. 18, 2008 Page 673 of 1458
Section 20
I
2
C Bus Interface (IIC)
REJ09B0033-0300

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