HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 713

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

20.3.3
ICMR selects whether the MSB or LSB is transferred first, performs master mode wait control,
and selects the transfer bit count.
Bit
4
3
2
1
0
Bit
7
6
Bit Name
SDAOP
SCLO

IICRST

Bit Name
MLS

I
2
C Bus Mode Register (ICMR)
Initial
Value
1
1
1
0
1
Initial
Value
0
0
R/W
R/W
R

R/W

R/W
R/W

Description
SDAO Write Protect
This bit controls change of output level of the SDA pin by
modifying the SDAO bit. To change the output level, clear
SDAO and SDAOP to 0 or set SDAO to 1 and clear
SDAOP to 0 by the MOV instruction. This bit is always
read as 1.
This bit monitors SCL output level. When SCLO is 1, SCL
pin outputs high. When SCLO is 0, SCL pin outputs low.
Reserved
This bit is always read as 1.
IIC Control Part Reset
This bit resets the control part except for I
this bit is set to 1 when hang-up occurs because of
communication failure during I
part can be reset without setting ports and initializing
registers.
Reserved
This bit is always read as 1.
Description
MSB-First/LSB-First Select
0: MSB-first
1: LSB-first
Set this bit to 0 when the I
Reserved
This bit is always read as 0. The write value should
always be 0.
Rev. 3.00 Jan. 18, 2008 Page 651 of 1458
2
C bus format is used.
Section 20
2
C operation, I
I
2
C Bus Interface (IIC)
REJ09B0033-0300
2
C registers. If
2
C control