HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 662

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 18
18.3.8
SCSSR is a 16-bit readable/writable register that indicates SCIF states. The ORER, TSF, ER,
TDFE, BRK, RDF, or DR flag cannot be set to 1. These flags can be cleared to 0 only if they have
first been read (after being set to 1). The flags TEND, FER, and PER are read-only bits and cannot
be modified.
Rev. 3.00 Jan. 18, 2008 Page 600 of 1458
REJ09B0033-0300
Bit
15 to 10 
9
Bit Name Initial Value R/W
ORER
Serial Status Register (SCSSR)
Serial Communication Interface with FIFO (SCIF)
All 0
0
R
R/(W)* Overrun Error Flag
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Indicates that the overrun error occurred during
reception.
This bit is valid only in asynchronous mode.
0: Indicates during reception, or reception has been
[Clearing conditions]
Power-on reset, manual reset
Writing 0 after reading ORER = 1
1: Indicates that the overrun error is generated during
[Setting condition]
When receive FIFO is full and the next serial data
reception is completed
Notes: 1. When the RE bit in SCSCR is cleared to 0,
completed without any error*
reception*
2. SCFRDR holds the data received before
the ORER flag is not affected and retains
its previous state.
the overrun error, and newly received data
is lost. When ORER is set to 1,
subsequent serial data reception cannot
be carried out.
2
1

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