HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 89

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Classification
Interrupts
Address bus
Data bus
Bus control
Symbol
PINT15 to
PINT0
REFOUT
IRQOUT
A25 to A0
D31 to D0
CS4 to CS2,
CS0
CS6A, CS6B,
CS5A, CS5B,
CE2A, CE2B,
CE1A, CE1B
RD
RD/WR
BS
BACK
BREQ
WE
WE3 (BE3)
WE2 (BE2)
WE1 (BE1)
WE0 (BE0)
CKE
I/O
I
O
O
O
I/O
O
O
O
O
O
I
O
O
O
O
O
O
Name
Port interrupt
requests 15 to 0
Bus request
Bus request
Address bus
Data bus
Chip select
Read strobe
Read/write
signal
Bus start
Bus request
acknowledge
Bus request
Write enable
Highest-byte
write
Second-highest-
byte write
Second-lowest-
byte write
Lowest-byte
write
Clock enable
Rev. 3.00
Function
Port interrupt request pins
Bus request signal for refreshing
Bus request signal for interrupt
Outputs addresses.
32-bit bidirectional data bus
Chip-select signal for external
memory or devices.
Indicates reading of data from
external devices.
Read/write signal
Bus-cycle start signal pin
Indicates that the bus mastership
has been released to an external
device.
Low when an external device
requests the release of the bus
mastership.
Write enable pin for PCMCIA
Indicates that bits 31 to 24 of the
data in the external memory or
device are being written.
Indicates that bits 23 to 16 of the
data in the external memory or
device are being written.
Indicates that bits 15 to 8 of the
data in the external memory or
device are being written.
Indicates that bits 7 to 0 of the data
in the external memory or device
are being written.
Clock enable (SDRAM)
Jan. 18, 2008
Section 1
REJ09B0033-0300
Page 27 of 1458
Overview

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