HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 786

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 21
(4)
Figure 21.12 shows an example of settings and operation for slave mode reception.
Rev. 3.00 Jan. 18, 2008 Page 724 of 1458
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Reception in Slave Mode
Store SIOFRXD receive data in SIRDR
Serial I/O with FIFO (SIOF)
SIRDAR, SICDAR, and SIFCTR
synchronously with SIOFSYNC
Clear the RXE bit in SICTR to 0
Set the RXE bit in SICTR to 1
Set SIMDR, SISCR, SITDAR,
Figure 21.12
RDREQ = 1?
Read SIRDR
Flow Chart
Transfer
ended?
Start
End
Yes
Yes
No
No
Example of Receive Operation in Slave Mode
Set operating mode, serial clock,
slot positions for transmit/receive
data, slot position for control data,
and FIFO request threshold value
Set to enable reception
Read receive data
Set to disable reception
SIOF Settings
Enable reception when the
frame synchronous signal is
input
Issue receive transfer request
according to the receive
FIFO threshold value
Reception
End reception
SIOF Operation