HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1119

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
31.3.21 Interrupt Status Register 2 (INTSTR2)
The INTSTR2 controls the MMCIF interrupt output.
If setting condition is satisfied, FRDYI is set even though it has been cleared. Disable flag setting
by FRDYIE in INTCR2 before clearing FRDYI.
Note:
Bit
7 to 2
1
0
*
Bit Name
FRDY_TU 1
FRDYIE
Cleared by writing 0 after reading 1.
Initial
Value
All 0
0
R/W
R
R/(W)* FIFO Preparation End Flag Enable
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
When FRDYI setting condition is satisfied.
Read value
0: When FIFO remained data is less than data set as
1: When FIFO remained data is other than data set as
[Setting condition]
When FIFO remained data is less than data set as assert
condition by DMACR while FRDYIE = 1 and the DMAEN
bit is set.
[Clearing condition]
Write 0 after reading FRDYI = 1.
assert condition by DMACR
assert condition by DMACR
Section 31
Rev. 3.00 Jan. 18, 2008 Page 1057 of 1458
MultiMediaCard Interface (MMCIF)
REJ09B0033-0300

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