HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 943

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

26.3.11 LCDC Horizontal Sync Signal Register (LDHSYNR)
LDHSYNR specifies the timing of the generation of the horizontal (scan direction) sync signals
for the LCD module.
Note: The following conditions must be satisfied:
Bit
15
14
13
12
11 to 8 
7
6
5
4
3
2
1
0
HTCN ≥ HSYNP+HSYNW+1
HSYNP ≥ HDCN+1
Bit Name
HSYNW3
HSYNW2
HSYNW1
HSYNW0
HSYNP7
HSYNP6
HSYNP5
HSYNP4
HSYNP3
HSYNP2
HSYNP1
HSYNP0
Initial Value R/W
0
0
0
0
All 0
0
1
0
1
0
0
0
0
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Horizontal Sync Signal Width
Set the width of the horizontal sync signals (CL1 and
Hsync) (unit: character = 8 dots).
Specify to the value of (the number of horizontal sync
signal width) -1.
Example: For a horizontal sync signal width of 8 dots.
Reserved
These bits are always read as 0. The write value
should always be 0.
Horizontal Sync Signal Output Position
Set the output position of the horizontal sync signals
(unit: character = 8 dots).
Specify to the value of (the number of horizontal sync
signal output position) -1.
Example: For a LCD module with a width of 640 pixels.
HSYNW = (8 dots/8 dots/character) -1 = 0 =
H'0
HSYNP = [(640/8) +1] -1 = 80 = H'50
In this case, the horizontal sync signal is
active from the 648th through the 655th dot.
Rev. 3.00 Jan. 18, 2008 Page 881 of 1458
Section 26
LCD Controller (LCDC)
REJ09B0033-0300