HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 342

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 9
(4) SDRAM interface
• Can set the SDRAM in up to two areas.
• Multiplex output for row address/column address.
• Efficient access by single read/single write.
• High-speed access by bank-active mode.
• Supports an auto-refresh and self-refresh.
• Supports low-power function.
(5) Byte-selection SRAM interface
• Can connect directly to a byte-selection SRAM.
(6) PCMCIA direct interface
• Supports IC memory cards and I/O card interfaces defined in the JEIDA specifications Ver. 4.2
• Controls the insertion of the wait state using software.
• Supports the bus sizing function of the I/O bus width (only in little endian mode).
(7) Burst ROM (clock synchronous) interface
• Can connect directly to a burst ROM of the clock synchronous type.
(8) Bus arbitration
• Shares all of the resources with other CPU and outputs the bus enable after receiving the bus
(9) Refresh function
• Supports the auto-refresh and self-refresh functions.
• Specifies the refresh interval using the refresh counter and clock selection.
• Can execute concentrated refresh by specifying the refresh counts (1, 2, 4, 6, or 8).
Rev. 3.00 Jan. 18, 2008 Page 280 of 1458
REJ09B0033-0300
(PCMCIA2.1 Rev 2.1).
request from external devices.
Bus State Controller (BSC)

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