HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 597

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

(1)
Figure 15.9 shows an example of the buffer operation setting procedure.
(2)
Figure 15.10 shows an operation example in which PWM mode has been designated for channel 0,
and buffer operation has been designated for TGRA and TGRC. The settings used in this example
are TCNT clearing by compare match B, 1 output at compare match A (TPU_TO pin), and 0
output at counter clearing. Rewriting timing from the buffer register is set at counter clearing.
As buffer operation has been set, when compare match A occurs the output changes. When
counter clearing occurs by TGRB, the output changes and the value in buffer register TGRC is
simultaneously transferred to timer general register TGRA. This operation is repeated each time
compare match A occurs.
For details of PWM modes, see section 15.4.4, PWM Modes.
Example of Buffer Operation Setting Procedure
Example of Buffer Operation
Set external pin function
Set buffer operation
Set rewriting timing
<Buffer operation>
Buffer operation
Figure 15.9
Start count
Example of Buffer Operation Setting Procedure
[1]
[2]
[3]
[4]
[1] Designate TGR for buffer operation with bits
[2] Set rewriting timing from the buffer register with
[3] Set the external pin function in pin function
[4] Set the CST bit in TSTR to 1 to start the count
BFA and BFB in TMDR.
bit BFWT in TMDR.
controller (PFC).
operation.
Rev. 3.00 Jan. 18, 2008 Page 535 of 1458
Section 15
16-Bit Timer Pulse Unit (TPU)
REJ09B0033-0300