HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 273

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

(2)
Write the longword data specified by the data filed, to the position specified by L of the address
field, in the entry that corresponds to the entry address and the way specified by the address field.
Table 5.8
Cache Size
16 kbytes
32 kbytes
Data-Array Write
(1) Address array access
(2) Data array access (both read and write accesses)
*: Don’t care bit
X: 0 for read, don’t care for write
(b) Data specification (both read and write accesses)
Figure 5.4 Specifying Address and Data for Memory-Mapped Cache Access
(a) Address specification
(b) Data specification
(a) Address specification
Read access
Write access
Address Format Based on the Size of Cache to be Assigned to Memory
31
31
31
31
31
1111 0000
1111 0000
1111 0001
24
24
24
Tag address (31 to 10)
23
23
23
*--------*
*--------*
*--------*
Entry Address Bits
11 to 4
12 to 4
14
14
14
(16-kbyte mode)
13
13
13
W
W
W
12
12
12
Longword
11
11
10
11
Entry address
Entry address
Entry address
9
Rev. 3.00 Jan. 18, 2008 Page 211 of 1458
LRU
W Bit
13 and 12
14 to 13
4
4
4
4
3
3
3
3
A
0
X
L
X
2
2
2
*
*
2
REJ09B0033-0300
Section 5 Cache
1
0
0
1
0
U
0
0
0
0
0
0
V
0
0