HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 949

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Bit
11
10
9
Bit Name
VSINTS
MINTS
FINTS
Initial Value
0
0
0
R/W
R/W
R/W
R/W
Description
Memory Access Interrupt State
Indicates the memory access interrupt handling
state.
This bit indicates 1 when the LCDC memory access
interrupt is generated (set state). During the
memory access interrupt handling routine, this bit
should be cleared by writing 0.
0: LCDC did not generate a memory access
1: LCDC has generated a memory access end
Flame End Interrupt State
Indicates the flame end interrupt handling state.
This bit indicates 1 at the time when the LCDC
flame end interrupt is generated (set state). During
the flame end interrupt handling routine, this bit
should be cleared by writing 0.
0: LCDC did not generate a flame end interrupt or
1: LCDC has generated a flame end interrupt and
Vsync Start Interrupt State
Indicates the LCDC's Vsync start interrupt handling
state. This bit is set to 1 at the time a Vsync start
interrupt is generated. During the Vsync start
interrupt handling routine, this bit should be cleared
by writing 0 to it.
0: LCDC did not generate a Vsync start interrupt or
1: LCDC has generated a Vsync start interrupt and
interrupt or has been informed that the generated
memory access interrupt has completed
interrupt and not yet been informed that the
generated memory access interrupt has
completed
has been informed that the generated flame end
interrupt has completed
not yet been informed that the generated flame
end interrupt has completed
has been informed that the generated Vsync
start interrupt has completed
has not yet been informed that the generated
Vsync start interrupt has completed
Rev. 3.00 Jan. 18, 2008 Page 887 of 1458
Section 26
LCD Controller (LCDC)
REJ09B0033-0300