HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 805

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
(2)
ASTR2 is the register that is composed of interrupt status flag (2 bits) relating DAA control and
mask flag (2 bits) of interrupt signals for DAA control. Status flags shows statuses of ringing
detect interrupt, end of dial pulse output interrupt. Interrupt flags are cleared by 0 write after read
action of this register. Each Interrupt signal can be masked by each interrupt masks.
Bit
0
Bit
15 to 10 
9
8
7 to 2
AFEIF Status Register 2 (ASTR2)
Bit Name
RHF
Bit Name
DPEM
RDETM
Initial Value
0
Initial Value
All 0
1
1
All 0
R/W
R
R/W
R
R/W
R/W
R
Description
Receive FIFO Half Size Full
0: Normal state
[Clearing conditions]
1: Rx FIFO half size interrupt
[Setting condition]
Description
Reserved
These bits are always read as 0. The write
value should always be 0.
Dial Pulse End Interrupt Mask
0: Interrupt enable
1: Interrupt mask
Ringing Detect Mask
0: Ringing interrupt enable
1: Ringing interrupt mask
Reserved
These bits are always read as 0. The write
value should always be 0.
Reset
Number of data in FIFO becomes smaller
than the half of the size that is indicated by
FFSZ
RE bit (ACTR1) is set to 0
The half of specified size with FFSZ
(ACTR1) of receive data is accumulated into
FIFO
Section 22
Rev. 3.00 Jan. 18, 2008 Page 743 of 1458
Analog Front End Interface (AFEIF)
REJ09B0033-0300

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