HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 678

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 18
to 0 in transmitting. Set the TFRST bit in the SCFCR to 1 and reset the SCFTDR before TE is set
again to start transmission.
When an external clock is used, the clock should not be stopped during initialization or subsequent
operation. SCIF operation becomes unreliable if the clock is stopped.
Figure 18.2 is a sample flowchart for initializing the SCIF.
Rev. 3.00 Jan. 18, 2008 Page 616 of 1458
REJ09B0033-0300
Serial Communication Interface with FIFO (SCIF)
Set operating clock source in SCSMR
Clear TE and RE bits in SCSCR to 0
bits in SCSCR2 (leaving TE and RE
Clear TFRST and RFRST bits to 0
TTRG1, and TTRG0 in SCFCR
Set TFRST and RFRST bits in
SCSCR to 1,and set RIE,
Set TE and RE bits in
1-bit interval elapsed?
Set RTRG1, RTRG0,
Set CKE1 and CKE0
Set value in SCBRR
bits cleared to 0)
Figure 18.2
SCFCR to 1
and TIE bits
Initialization
End
Yes
Wait
Sample SCIF Initialization Flowchart
(4)
No
(1)
(2)
(3)
(1) Set the clock selection in SCSCR.
(2) Set the operating clock source in SCSMR.
(3) Write a value corresponding to the bit rate
(4) Wait at least one bit interval, then set the
Be sure to clear bits RIE TIE, TE, and RE
to 0.
into SCBRR.
(Not necessary if an external clock is used.)
TE bit or RE bit in SCSR to 1. Also set the
RIE and TIE bits.
Setting the TE and RE bits enables the
TxD and RxD pins to be used. When
transmitting, the SCIF will go to the mark
state; when receiving, it will go to the idle
state.